IEEE Std C37.010:1999 pdf free download

IEEE Std C37.010:1999 pdf free download.IEEE Application Guide for AC High-Voltage Circuit Breakers Rated on a Symmetrical Current Basis.
5.7 Interrupting time
The rated interrupting time of a circuit breaker is the maximum permissible iiiteral between the energization of the trip circuit at rated control voltage and rated mechanism pressure and the interruption of the current in the main circuit in all poles. It is used to classify breakers of different speeds.
The rated interrupting time may be exceeded for close-open operations. The increase in interrupting time on close-open operation may he important from the standpoint of possible system instability. For low values of current, these considerations are less important.
At duties below 25% of the required interrupting capability at rated maximum voltage, the time required for interruption for oil and air magnetic breakers may be greater than the interrupting time by as irnich as 50% for 5-cycle and K-cycle breakers, and I cycle for breakers of 3 cycles or less.
The rated interrupting times of specific circuit breaker ratings are given in the tables of IEEE Sid C37.06- 1997. Short interrupting times may be significant where system stability is critical. Application considerations including required margins should be incorporated in determining expected clearing time.
For line-to-ground faults, the interrupting time is estimated to exceed the rated interrupting time by 0.1 cycle. For asymmetrical faults, it is estimated that the interrupting time may exceed rated time by an additional 0.2 cycle. Hence, for grounded asymmetrical faults, the last phase to clear is estimated to be 0.3 cycle slower than the rated interrupting time. Additionally. rated interrupting time may be exceeded during extreme cold weather(see 4.2.l)or when the breaker has been clot.or an extended period 0 time. Also, the breaker may be slower at the lower limits of control voltage and/or mechanism stored energy. These longer interrupting times are in the range of several milliseconds and may have system stability implications.
Figure 2 shows the sequence of events in the course of a circuit interruption and reclosure.